The present invention relates generally to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device in which a CoSi2 layer can be formed without the loss of the junction region.
In a highly integrated semiconductor device, it is essential to secure stable contact between upper and lower patterns. The reason for this resides in that, even with finely formed patterns, if stable contact between the upper and lower patterns is not secured, the reliability of the semiconductor device can deteriorate and high speed drivability thereof cannot be accomplished.
Meanwhile, in a highly integrated semiconductor device the size of a contact must be decreased. This decrease in the contact size results in an increase in contact resistance. In order to compensate for the decrease in the size of a contact and to decrease contact resistance, studies have been conducted regarding the suitability of a TiSi2 layer formed at a region where upper and lower patterns contact each other.
However, when the TiSi2 layer is formed in a contact hole, and when the size of a contact hole is decreased, contact resistance is increased. As a result, studies are being conducted on the suitability of the use of a CoSi2 layer for decreasing contact resistance rather than using the TiSi2 layer.
A conventional method for forming a CoSi2 layer will be briefly described below.
An insulation layer is formed on a semiconductor substrate having transistors. The insulation layer is etched to define a contact hole that exposes the junction region of the semiconductor substrate. A Co layer is deposited on the insulation layer and the surface of the contact hole. An annealing process is then conducted on the semiconductor substrate having the Co layer, and thereby, a CoSix layer is formed on the portion of the semiconductor substrate at the bottom of the contact hole (that is, on the surface of the junction region). Thereafter, a portion of the Co layer, which did not react when forming the CoSix layer, is removed. Then, a CoSi2 layer is formed by annealing the CoSix layer.
However, the conventional method for forming a CoSi2 layer described above causes a loss of a portion of the semiconductor substrate on which the CoSi2 layer is formed (that is, the junction region). This causes the leakage current characteristics of the semiconductor device to degrade, which can be very problematic.
In more detail, the CoSix layer is formed through process steps including depositing and annealing the Co layer. At this time, the thickness of the CoSi2 layer, which is formed by the reaction of Co and Si, becomes 3.35 times greater than the deposition thickness of the Co layer. In this regard, it is conceivable that a substantial portion of the junction region of the semiconductor substrate reacts with the Co layer. Hence, since the thickness of the junction region of the semiconductor substrate (that is, the size of the junction region) decreases by the thickness of the junction region that reacts with the Co layer, the leakage current characteristics of the semiconductor device degrade and the electrical characteristics of the semiconductor device are adversely influenced, whereby operation errors can be caused in the semiconductor device.
Moreover, the Co layer is deposited through chemical vapor deposition (CVD), and while the Co layer is being deposited, (in this case, the composition of the entire Co layer is uniform), reaction is likely to occur between the semiconductor substrate and the deposited Co layer in the course of depositing the Co layer. Consequently, as the size of the junction region decreases, the above-described problems are caused. In particular, in the conventional art, it is difficult to secure a process margin in terms of reproducibility.